As DRAMs increase in memory cell density, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area. One principal way of increasing cell capacitance is through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. Yet as feature size continues to become smaller and smaller, development of improved materials for cell dielectrics as well as the cell structure are important. The feature size of 256 Mb DRAMs and beyond will be on the order of 0.25 micron or less, and conventional dielectrics such as SiO2 and Si3N4 might not be suitable because of small dielectric constants.
Highly integrated memory devices, such as 256 Mbit DRAMs, are expected to require a very thin dielectric film for the 3-dimensional capacitor of cylindrically stacked or trench structures. To meet this requirement, the capacitor dielectric film thickness will be below 2.5 nm of SiO2 equivalent thickness.
Insulating inorganic metal oxide materials (such as ferroelectric materials, perovskite materials and pentoxides) are commonly referred to as “high k” materials due to their high dielectric constants, which make them attractive as dielectric materials in capacitors, for example for high density DRAMs and non-volatile memories. In the context of this document, “high k” means a material having a dielectric constant of at least 11. Such materials include tantalum pentoxide, barium strontium titanate, strontium titanate, barium titanate, lead zirconium titanate and strontium bismuth titanate. Using such materials enables the creation of much smaller and simpler capacitor structures for a given stored charge requirement, enabling the packing density dictated by future circuit design.
Certain high k dielectric materials have better current leakage characteristics in capacitors than other high k dielectric materials. In some materials, aspects of a high k material which might be modified or tailored to achieve a highest capacitor dielectric constant possible will unfortunately also tend to hurt the leakage characteristics (i.e., increase current leakage). For example, one class of high k capacitor dielectric materials includes metal oxides having multiple different metals bonded with oxygen, such as the barium strontium titanate, lead zirconium titanate, and strontium bismuth titanate referred to above. For example with respect to barium strontium titanate, it is found that increasing titanium concentration as compared to barium and/or strontium results in improved leakage characteristics, but decreases the dielectric constant. Accordingly, capacitance can be increased by increasing the concentration of barium and/or strontium, but unfortunately at the expense of increasing leakage. Further, absence of titanium in the oxide lattice creates a metal vacancy in such multimetal titanates which can increase the dielectric constant, but unfortunately also increases the current leakage.
One method of decreasing leakage while maximizing capacitance is to increase the thickness of the dielectric region in the capacitor. Unfortunately, this is not always desirable. Another prior art method of decreasing leakage is described with respect to FIG. 1. There illustrated is a semiconductor wafer fragment 10 comprising a bulk monocrystalline silicon substrate 12. In the context of this document, the term “semiconductor substrate” or “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above. A conductive diffusion region 14 is formed within substrate 12. An insulating dielectric layer 16 is formed over substrate 12, and includes an opening 18 formed therein to diffusion region 14. Opening 18 is filled with a suitable conductive material 20, for example conductively doped polysilicon or a metal such as tungsten. Barrier, silicide or other layers might also of course be utilized, but are not otherwise described.
A capacitor construction 22 is formed outwardly of insulating dielectric layer 16 and in electrical connection with conductive plugging material 20. Such comprises an inner capacitor electrode 24, an outer capacitor electrode 26, and a capacitor dielectric region 25 sandwiched therebetween. Capacitor dielectric region 25 comprises a composite of three layers 26, 27 and 28. Region 27 comprises a layer of metal oxide having multiple different metals bonded with oxygen, such as barium strontium titanate, fabricated to provide a stoichiometry which maximizes the dielectric constant of the material. As referred to above, this unfortunately adversely affects the desired leakage properties of the layer. Accordingly, layers 26 and 28 are received outwardly of layer 27 and comprise a material such as Si3N4 which exhibits extremely low current leakage. Unfortunately, Si3N4 has a considerably lower dielectric constant than the metal oxides having multiple different metals bonded with oxygen. Such adversely reduces the overall dielectric constant, and accordingly the capacitive effect of capacitor dielectric region 25.